In image processing applications, the concept of feature detection refers to methods that aim at determining whether there is an image feature of a given type in an image. For example, many computer vision algorithms use feature detection. Image features to be detected may, for example, include edges, corners, ridges, and so on.
Algorithms have been used to detect features in images; however, these algorithms can be very computationally intensive, require expensive circuitry and consume large amounts power.
The present disclosure uses time encoders to perform feature detection. An example of coupled time encoders is described by J. M. Cruz Albrecht and P. Petre, “Spike Domain and Pulse Domain Non Linear Processors,” U.S. Pat. No. 7,822,698, issued October 2010; however, the coupling described is different and cannot be used for synchronization as described in the present disclosure. T. Shibata, R. Zhang, S. P. Levitan, D. Nikonov and G. Bourianoff, “CMOS Supporting Circuitries for Nano Oscillator Based Associative Memories,” Proc. Intl. Workshop on Cellular Nanoscale Networks and their Applications, 2012 describe an oscillator cluster based in inverters; however, time encoders are not used. S. P. Levitan, Y. Fang, D. H. Dash, T. Shibata, D. E. Nikonov and G. I. Bourianoff, “Non Boolean Associative Architectures Based on Nano Oscillators,” Proc. Intl. Workshop on Cellular Nanoscale Networks and their Applications, 2012 describe idealized oscillator clusters for comparing an input with a template; however, again time encoders are not used.
What is needed is a circuit and method for image feature detection that has less circuitry and low power. The embodiments of the present disclosure answer these and other needs.